---
title: "ASIC Digital Design, Sr… at Synopsys – Bengaluru, India"
canonical: "https://www.metaintro.com/job/asic-digital-design-sr-staff-engineer-at-synopsys-d4e7fed9-38ad-56e3-84f5-bf0867370dc0"
language: "en"
author: "Metaintro"
---

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# ASIC Digital Design, Sr Staff Engineer at Synopsys

**Location**
: Bengaluru, Karnataka

**Level**
: senior

**Posted**
: Aug 19, 2026

## Description

Synopsys is hiring an RTL/IP Design Engineer to design and code high-speed Ethernet IP cores from 100G to 1.6T, translate protocol specifications into micro-architecture and detailed design documents, build directed Verilog testbenches, perform technical reviews, and drive timing closure using synthesis, STA, lint, CDC, and formal verification. The role applies low-power design and automotive safety requirements and collaborates with verification, integration, and product teams across Bangalore, the United States, and other global sites.

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