---
title: "Chip Design Engineer at Ricursive… – Palo Alto, CA"
canonical: "https://www.metaintro.com/job/chip-design-engineer-at-ricursive-intelligence-113bac45-e3de-5fed-88d0-bd4c1eb0cf26"
language: "en"
author: "Metaintro"
---

[![Ricursive Intelligence logo](/api/company-logo?url=https%3A%2F%2Fframerusercontent.com%2Fimages%2Fk7EC5Z8igoBuqxxVYd3EdHxX2C0.png&sig=6I7GIKITCN4CnfxfIryegNyIupo2tRpdGQTZcPrOKxU)](/company/ricursive-intelligence)[Ricursive Intelligence](/company/ricursive-intelligence)
# Chip Design Engineer at Ricursive Intelligence

Department: Engineering

**Setup**
: On-site

**Location**
: Palo Alto, California

**Type**
: Full-time

**Level**
: senior

**Posted**
: Sep 10, 2026

## Description

Ricursive Intelligence is hiring a Physical Design Engineer to own the full chip design flow from synthesis through tapeout, including DFT insertion, floorplanning, PDN, placement, CTS, routing, timing, power, EM/IR, and physical signoff. The role focuses on closing complex, PPA-critical blocks in advanced nodes, supporting chip-design infrastructure and automation, and driving design improvement strategies. Candidates need a relevant bachelor's degree, at least five years of hands-on physical-design experience, production-stack fluency, strong Tcl and Python scripting, and a successful tapeout record.

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