---
title: "Design Verification Engineer at Apple – Beaverton, OR"
canonical: "https://www.metaintro.com/job/design-verification-engineer-at-apple-fee3185a-e281-5cb3-9330-648aaa431d76"
language: "en"
author: "Metaintro"
---

[![Apple logo](/api/favicon-proxy?url=https%3A%2F%2Fwww.google.com%2Fs2%2Ffavicons%3Fdomain%3Dwww.apple.com%26sz%3D128)](/company/apple)[Apple](/company/apple)
# Design Verification Engineer at Apple

Department: Hardware

**Location**
: Beaverton, Oregon

**Level**
: senior

**Posted**
: Apr 10, 2026

## Description

Apple is hiring a Design Verification Engineer to verify the functionality and performance of Apple’s System-on-Chip (SOC) designs. The role collaborates with design, architecture, and software teams; reviews specifications; develops test plans, tests, coverage plans, verification methodologies, and testbenches; and addresses use cases and corner conditions. The engineer may focus on one IP or several subsystems, including neural engines, memory controllers, codecs, security, high-speed interfaces, power management, cache management, and display subsystems. The minimum qualification is a bachelor’s degree plus 10 years of relevant industry experience, with digital verification, SystemVerilog, computer architecture, scripting, UVM, and C/C++ experience preferred.

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