---
title: "Design Verification Engineer at Apple – San Diego, CA"
canonical: "https://www.metaintro.com/job/design-verification-engineer-at-apple-ff94efc9-5b4a-5aa8-80f3-8b52639ba071"
language: "en"
author: "Metaintro"
---

[![Apple logo](/api/favicon-proxy?url=https%3A%2F%2Fwww.google.com%2Fs2%2Ffavicons%3Fdomain%3Dwww.apple.com%26sz%3D128)](/company/apple)[Apple](/company/apple)
# Design Verification Engineer at Apple

Department: Hardware

Compensation

$142,300 – $214,300/yr

**Location**
: San Diego, California

**Type**
: Full-time

**Level**
: not_specified

**Posted**
: Oct 1, 2026

## Description

Apple is hiring an SoC Emulation Verification Engineer in San Diego, California to bring up and verify large wireless and display SoCs on emulation platforms such as Palladium, Protium, Zebu, and Veloce. The role develops Verilog/System Verilog/UVM models, monitors, checkers, assertions, test benches, and automated test cases; executes and debugs emulation tests; analyzes regressions; collects coverage; and collaborates with design, architecture, power, silicon validation, and other cross-functional teams. The position requires a master’s degree or foreign equivalent in electrical or electrical and computer engineering, along with specified SoC verification, digital design, scripting, simulation, and UVM experience, and offers a base pay range of $142,300 to $214,300 per year.

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