---
title: "Digital Design… at Synopsys – Mississauga, Canada"
canonical: "https://www.metaintro.com/job/digital-design-verification-intern-at-synopsys-56be6fde-0392-5cdd-be76-3b19de2cca2f"
language: "en"
author: "Metaintro"
---

[![Synopsys logo](/api/favicon-proxy?url=https%3A%2F%2Fwww.google.com%2Fs2%2Ffavicons%3Fdomain%3Dwww.synopsys.com%26sz%3D128)](/company/synopsys)[Synopsys](/company/synopsys)
# Digital Design Verification Intern at Synopsys

LanguageEnglish
Français

**Setup**
: Hybrid

**Location**
: Mississauga, Ontario

**Type**
: Internship, Contract

**Level**
: intern

**Posted**
: Sep 3, 2026

## Description

Synopsys is hiring a Digital Design Verification Intern to join its IP Group in Mississauga, Ontario. The role involves defining verification test plans, writing constrained-random SystemVerilog testbenches using UVM, creating assertions, debugging RTL and gate-level simulation failures, and performing functional and code coverage analysis. The internship is a full-time, 16-month co-op program with a hybrid work model and a start date of May 2027.

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