---
title: "Lead Software Engineer - Logic… at Cadence – Huangpu, China"
canonical: "https://www.metaintro.com/job/lead-software-engineer-logic-synthesis-at-cadence-f87e9c6b-4e06-579e-8b7f-e20ce0b17b7e"
language: "en"
author: "Metaintro"
---

[/company/cadence-924eab70](/company/cadence-924eab70)[Cadence](/company/cadence-924eab70)
# Lead Software Engineer - Logic Synthesis at Cadence

LanguageEnglish
中文

**Location**
: Huangpu, Shanghai

**Type**
: Full-time

**Level**
: mid

**Posted**
: Sep 8, 2026

## Description

Cadence is hiring a synthesizer development engineer to develop and maintain the Palladium synthesizer, implement new VHDL/Verilog feature support, and improve logic optimization and performance. The role requires a bachelor's or master's degree in EE, CS, or CE, 3–5 years of industry experience, C/C++ and operating-system knowledge, RTL modeling, and familiarity with EDA/CAD tool development or logic design verification; UVM, SC/TLM, AI coding tools, and communication skills are also mentioned.

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