---
title: "Software Engineer — RISC-V Random Test… – Cupertino, CA"
canonical: "https://www.metaintro.com/job/software-engineer-risc-v-random-test-generator-at-qualcomm-122b0dc3-df6e-50fb-93a1-cb398772b8d4"
language: "en"
author: "Metaintro"
---

[/company/qualcomm-international-inc-mexico-branch-office](/company/qualcomm-international-inc-mexico-branch-office)[Qualcomm International Inc., Mexico Branch Office](/company/qualcomm-international-inc-mexico-branch-office)
# Software Engineer — RISC-V Random Test Generator at Qualcomm International Inc., Mexico Branch Office

Department: CPU Engineering

Compensation

$175,600 – $263,400/yr

**Setup**
: On-site

**Location**
: Cupertino, California

**Type**
: Full-time

**Level**
: mid

**Posted**
: Sep 17, 2026

## Description

Qualcomm is hiring a RISC-V CPU Verification Engineer to develop and tune a Python-based random test generation framework and assembler library for RISC-V CPU design verification. The role involves creating generation objects and instruction encodings, writing test themes, supporting privileged-software stacks, and collaborating with ISS and RTL verification engineers to triage failures and improve coverage. Candidates need 2–5 years of relevant CPU verification, ISS development, or hardware-software co-design experience, strong Python 3 skills, and RISC-V ISA knowledge; the listed pay range is $175,600 to $263,400.

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