---
title: "Substrate / Advanced… at taiwansemiP1 – San Jose, CA +1"
canonical: "https://www.metaintro.com/job/substrate-advanced-package-engineer-at-taiwansemip1-d1c910c0-472d-5c9f-86da-bcd42fa5eb3a"
language: "en"
author: "Metaintro"
---

[/company/taiwansemip1](/company/taiwansemip1)[taiwansemiP1](/company/taiwansemip1)
# Substrate / Advanced Package Engineer at taiwansemiP1

LanguageEnglish
中文

Compensation

$153,500 – $250,000/yr

**Location**
: San Jose, California · Hsinchu

**Type**
: Full-time

**Level**
: senior

## Description

TSMC is hiring a Substrate / Advanced Package Engineer for its cutting-edge 3DIC design team to drive advanced packaging and substrate engineering for next-generation semiconductor systems. The role focuses on design, simulation, modeling, and cross-functional specification development for complex packaging technologies, including warpage, stress, thermal performance, high-speed I/O, reliability, and integration challenges. The position requires deep technical expertise in advanced packaging, substrate design, semiconductor physics, mechanical engineering, and EDA tools, with strong collaboration and mentoring skills. The job is based in San Jose, California or Hsinchu, Taiwan, and offers a base salary range of $153,500 to $250,000 per year.

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