Qualcomm International Inc., Mexico Branch Office

3DIC Yield Analytics & Diagnostics Engineer, Staff at Qualcomm International Inc., Mexico Branch Office

Department: ASICS Engineering

Language

Setup: On-site
Location: Hsinchu
Level: staff+
Posted: Jul 10, 2026

Description

Qualcomm Semiconductor Limited is hiring a Staff 3DIC Yield Analytics & Diagnostics Engineer to lead yield learning and diagnostics for 2.5D, 3DIC, chiplet, and heterogeneous integration technologies. The role analyzes large-scale semiconductor datasets, develops analytics frameworks and dashboards, performs root-cause analysis across wafer, package, assembly, and multi-die environments, and applies statistical modeling, machine learning, and AI to improve predictive yield learning. The engineer will collaborate with Product Engineering, Design, Test, Foundry, Packaging, Assembly, Reliability, and OSAT partners to support NPI and high-volume manufacturing while driving systematic yield improvement.

Required Skills

Yield analytics
Diagnostics
Python
JMP
SQL
Power BI
Statistical modeling
Machine learning
Root-cause analysis
DRAM diagnostics

Additional Information

Minimum Education: Bachelor's degree in Science, Engineering, or a related field with 4+ years of relevant experience; alternatively, a Master's degree with 3+ years or a PhD with 2+ years of relevant experience.
Required Previous Experiences: Experience in semiconductor yield analytics, diagnostics, and manufacturing data analysis
Experience driving yield improvement in high-volume manufacturing environments
Experience analyzing large-scale semiconductor datasets and developing data-driven solutions for complex yield challenges
Experience with semiconductor test methodologies, failure analysis, and yield learning processes
4+ years of ASIC design, verification, validation, integration, or related work experience
Preferred Qualifications: Deep understanding of 2.5D/3DIC architectures, chiplet integration, TSV/interposer technologies, hybrid bonding, and advanced packaging flows
Experience building and scaling yield analytics frameworks, diagnostics methodologies, and data infrastructure
Familiarity with process correlation, defect characterization, and failure-mechanism modeling
Experience working with advanced packaging, assembly, OSAT, and foundry manufacturing environments
Hands-on experience applying AI/ML techniques to semiconductor yield analytics and diagnostics
Experience with DRAM, HBM, and stacked-memory diagnostics
Knowledge of package reliability, failure analysis, and heterogeneous integration challenges
Demonstrated technical leadership and ability to drive cross-functional yield improvement initiatives