Description
The Advanced Packaging & Integration Lead will develop and scale packaging solutions for multi-chip silicon spin-qubit devices in a quantum computing system. The role covers 3D integrated-circuit architecture, TSV and micro-bump interconnects, flip-chip bonding, cryogenic reliability, simulation, yield and failure analysis, manufacturability, and technical transfers with external semiconductor partners. Candidates need a master’s or PhD in a relevant field, at least seven years of 3D integration and advanced-packaging experience, and expertise in multi-die co-design, cryogenic analysis, and semiconductor manufacturing partnerships.
