Description
Synopsys is hiring a senior analog IC design engineer for its Vietnam analog design team. The role focuses on high-speed mixed-signal PHY circuits, including CTLE, FFE, TCOIL, DFE, PLL, DLL, bandgap references, clock trees, calibration circuits, and UCIe and die-to-die PHY products. Responsibilities include analog circuit design, post-layout verification, signal and power integrity analysis, testchip architecture, silicon bring-up, design reviews, and mentoring junior engineers. Candidates need a BS, MS, or PhD in a relevant engineering field, at least 8 years of hands-on high-speed mixed-signal PHY experience with taped-out designs, and at least 3 years leading design teams or owning full design blocks.
