Analog Design, Staff Engineer at Synopsys

Synopsys is hiring an Analog Circuit Design Engineer to develop and verify analog and mixed-signal building blocks for SerDes IP. The role covers sub-block performance, circuit implementation optimization, physical layout, verification, simulation, electrical characterization, documentation, and collaboration with digital RTL engineers. Candidates need an MSc and at least four years of SerDes or high-speed analog design experience, along with expertise in CMOS, EDA tools, SPICE, Verilog-A, and programming languages such as TCL, Perl, C, Python, and MATLAB.