Summary from listing
Capgemini Engineering is hiring an experienced Analog / RF Layout Designer for an onsite role in Santa Clara, California. The position develops block-level and IP-level analog and RF layouts, owns floorplanning, placement, routing, and optimization for complex analog and mixed-signal blocks, supports top-level SoC integration, and applies advanced process knowledge including FinFET, EM, ESD, latch-up, and reliability. The role also involves resolving DRC, LVS, antenna, and verification issues and may include mentoring or guiding team members.
