Description
Synopsys is seeking an Emulation Verification Engineer to architect custom ZeBu emulation methodologies, lead debugging and root-cause analysis of emulation runtime performance bottlenecks, support SoC verification and customer success, and collaborate with R&D teams on product requirements and tool features. The role requires at least 15 years of emulation-methodology experience, expertise in SoC bring-up and validation, knowledge of emulation and FPGA prototyping platforms, and proficiency with HDL, HVL, C/C++, Unix, and related ASIC, VLSI, and CAD-engineering practices.
