Applications Engineering, Principal Engineer - 18793 at Synopsys

Compensation

$160,000 – $240,000/yr

Location: Austin, Texas
Type: Full-time
Level: lead/mgmt
Posted: Sep 11, 2026

Description

Synopsys is hiring a Principal Engineer for Applications Engineering in Austin, Texas, to lead Tier-1 customer engagements on RTL power analysis for AI accelerators, mobile processors, and complex SoCs. The role owns Prime Power RTL methodology, multi-tool integration, WCDF calibration, glitch and memory power estimation, NDM correlation, and cross-tool escalations, while coaching Staff-level engineers, partnering with Sales and R&D, and influencing product adoption and roadmap priorities. Candidates need a bachelor's degree in electrical or computer engineering with 10+ years of relevant experience, or a master's degree with 8+ years; the base salary is $160,000–$240,000 across the United States.

Required Skills

RTL power analysis
Prime Power RTL
WCDF calibration
VCS simulation
Verdi debug
UPF power intent
Tcl flow development
PrimeTime PX correlation
Glitch estimation

Additional Information

Minimum Education: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; alternatively, a master's degree with 8+ years of experience, with a PhD preferred.
Required Previous Experiences: 10+ years of experience in EDA applications engineering, design consulting, or IC design.
Expert-level RTL power analysis experience, including clock gating, glitch estimation, memory modeling, and multi-rail UPF analysis.
Hands-on Prime Power RTL experience, including flow setup, WCDF calibration, stimulus analysis, and correlation methodology.
Advanced experience with VCS, Verdi, SDF back-annotation, UPF power intent, and Tcl-based flow development.
Proven experience leading complex strategic customer engagements with measurable business impact.
Experience with PrimeTime PX signoff correlation, RTL Architect or Fusion Compiler physical estimation flows, or ZeBu emulation-based power analysis is preferred.
Preferred Qualifications: PhD preferred
Familiarity with VC SpyGlass or VC LP low-power verification tools and the IEEE 1801 UPF specification