Description
Synopsys is hiring a Verification Applications Engineer in Hyderabad to support customers using verification tools such as VCS and Verdi. The role involves diagnosing simulation failures, analyzing testbenches, resolving SystemVerilog and UVM verification issues, automating workflows with Tcl, Python, or Perl, collaborating with R&D, and guiding customers through tape-out cycles. The position is remote-eligible, requires a bachelor's or master's degree in electronics or a related field, and calls for 2+ years of verification or digital design experience.
