Description
Synopsys is hiring a Principal Post-Silicon Applications Engineer in Porto, Portugal, to provide senior technical support for PCIe 6.0 and PCIe 7.0 silicon bring-up and production. The role leads root-cause analysis of signal integrity, protocol compliance, interoperability, and system-level issues; uses high-bandwidth laboratory instrumentation; analyzes Verilog/SystemVerilog RTL; and collaborates with customer architects and internal design teams. The engineer will travel approximately twice annually and mentor applications and validation engineers.
