Applications Engineering, Sr Staff Engineer at Synopsys

Language

Location: Riyadh, Riyadh
Level: senior
Posted: Sep 1, 2026

Description

Synopsys is hiring an Emulation and Prototyping Engineer to develop and deploy hardware-assisted verification products, including ZeBu, for customers and R&D. The role covers emulation and prototyping flows, test strategies, product release processes, customer and cross-functional collaboration, and support for designs across HPC, AI, storage, networking, automotive, and hyperscale verticals. Candidates need a BSEE/MS, at least 10 years of related experience, and expertise in Verilog, System Verilog, VHDL, C/C++, Python, Tcl, simulation, and debugging; familiarity with Synopsys tools and Xilinx/Altera architectures is preferred.

Required Skills

Emulation
Prototyping
Verilog
System Verilog
VHDL
C/C++
Python
Tcl
Functional Simulation
Assertion
DPI
Transactors
Timing Analysis
Xilinx/Altera
PCIe
SW/HW Debug

Additional Information

Minimum Education: Bachelor of Science in Electrical Engineering or Master of Science
Required Previous Experiences: 10+ years of related experience
Expertise in emulation and prototyping flows, systems, and methodologies
Proficiency in Verilog, System Verilog, VHDL, and C/C++
Experience with verification concepts and functional simulators
Experience with Python and Tcl scripting languages
Knowledge of simulation flows, assertions, DPI, and transactors
Complex problem-solving and debugging skills
Strong communication and customer and peer interaction skills
Preferred Qualifications: Knowledge of synthesis and timing analysis
Familiarity with Synopsys tools including ZeBu, HAPS, VCS, Verdi, Proto Compiler, Synplify, DC, and Formality
Experience with Xilinx and Altera architectures and toolchains
Knowledge of PCIe, USB, Ethernet, DRAMs, HBM, and NAND Flash
Knowledge of CPU architecture and operating systems
Understanding of software/hardware debugging methodologies and tools
DFT solutions