Applications Engineering, Sr Staff Engineer - STA at Synopsys

Synopsys is hiring a customer-facing Signoff Static Timing Analysis Engineer to work with semiconductor companies on complex timing constraints, signoff, timing closure, ECO, and PrimeTime solutions for advanced-node designs. The role involves debugging timing issues, developing reference flows and automation scripts, collaborating with R&D and product teams, and delivering customer training and demonstrations. Candidates need a B.Tech or M.Tech in relevant electronics or VLSI fields, strong hands-on experience with Synopsys PrimeTime or equivalent static timing analysis tools, and expertise in SDC, timing closure, RTL flows, and customer engagement.