ARM CPU Subsystem Design Leader at RenesasElectronics

Seniority in posting: senior

Language

Setup: On-site
Location: Tokyo
Type: Full-time
Level: lead/mgmt
Posted: Apr 2, 2026

Description

Renesas is hiring a CPU Subsystem Technical Lead to define specifications and architecture for the CPU subsystem of R-Car automotive SoCs, including cache, memory, and interconnect considerations. The role leads technical decisions and design reviews, coordinates with IP vendors and global design teams in India and Vietnam, and considers power, performance, reliability, and functional-safety constraints. Candidates need CPU, cache, or memory subsystem experience, technical communication and English proficiency, and preferably SoC integration, multi-core, or automotive experience.

Required Skills

CPU subsystem
Cache architecture
Memory interface
Logic verification
IP vendor coordination
English communication

Additional Information

Required Previous Experiences: CPU processor-core or exception/interrupt-control experience
Cache architecture, coherency, or memory-consistency experience
Memory interconnect, control, or interface experience
Experience defining design direction and technical issues based on requirements
Experience participating in logic design and verification reviews
Experience coordinating with teams and IP owners to reach technical agreement
Preferred Qualifications: Technical lead experience for subsystems or IP units
Multi-core CPU or cache-coherency control experience
SoC integration experience involving CPU, cache, and memory
Power-isolation design and physical design knowledge
Automotive SoC or functional-safety/reliability design and verification experience
Technical coordination with IP vendors or overseas teams
Japanese communication proficiency
Translation Company Name: Renesas Electronics