ASIC & FPGA Design Engineer Stf - E4 at Lockheed Martin

Department: LM Aeronautics Co- Fort Worth

Compensation

$135,700 – $251,900/yr

Setup: On-site
Location: Louisville, Colorado
Type: Full-time
Level: senior
Posted: Sep 2, 2026

Description

Lockheed Martin is hiring a Hardware Development Engineer to design, develop, verify, and document ASIC and FPGA hardware for advanced aerospace programs, including F-35, F-16, and Skunk Works initiatives. The role covers HDL and embedded C/C++ development, FPGA IP cores, architecture and logic design, system simulation, verification, and research on emerging technologies. Candidates must be U.S. citizens, obtain and maintain a DoD Secret clearance, and have experience with FPGA verification and HDL development. The position offers a full-time salary range of $135,700 to $251,900 and medical, dental, vision, and other benefits.

Required Skills

Embedded C/C++
FPGA design
SystemVerilog
VHDL
UVM
System simulation
Configuration management
Continuous integration

Additional Information

Minimum Education: Bachelor's degree in Electrical or Computer Engineering, a related discipline, or equivalent experience and education
Required Previous Experiences: FPGA device verification
HDL development with VHDL, Verilog, or SystemVerilog
Preferred Qualifications: UVM, OVM, or VMM verification methodologies
FPGA life-cycle experience
System architecture and UML diagrams
Automated test pattern generation and formal design checks
Agile development, configuration management, and continuous integration
Digital design, development, and simulation
Metrics collection, analysis, and reporting