ASIC & FPGA Design Engineer Stf - E4 at Lockheed Martin

Lockheed Martin is hiring a full-time ASIC & FPGA Design Engineer in Orlando, Florida, to lead digital development of RF-sensor platforms. The role converts MATLAB/Simulink models into synthesizable RTL and HLS code, integrates IP on AMD RFSoC and Versal devices, performs simulation, verification, timing closure, and system validation, and mentors junior engineers. Candidates need an electrical or computer engineering degree, experience with AMD RFSoC and Versal, VHDL/Verilog or SystemVerilog, Vivado HLS, FPGA simulation, RF-DSP hardware implementation, and the ability to obtain a secret clearance; U.S. citizenship is required. The salary range is $120,600 to $224,000, with medical, dental, vision, and other benefits.