ASIC & FPGA Design Engineer Stf - E4 at Lockheed Martin

Lockheed Martin Space is hiring a Field Programmable Gate Array (FPGA) Design Engineer to develop and test FPGA-based mission-processing subsystems for space-based remote-sensing payloads. The role involves translating C++ mission-processing code into hardware, developing VHDL and Verilog designs, creating test benches, and integrating processor subsystems on flight hardware. The position is based in Boulder, Colorado, requires a TS/SCI clearance, and offers a full-time salary range of $135,700 to $251,900 plus benefits.