ASIC & FPGA Design Engineer Stf - E4 at Lockheed Martin

Department: MFC-Chelmsford

Compensation

$135,700 – $251,900/yr

Setup: Hybrid
Location: Andover, Massachusetts
Type: Full-time
Level: senior
Posted: Sep 17, 2026

Description

The FPGA Hardware Engineer develops, validates, and troubleshoots digital FPGA designs for defense electronics, including RF systems, datalink, and T/R modules. The role requires VHDL, Verilog, SystemVerilog, Xilinx Vivado, FPGA simulation, hardware-software integration, digital design, and production troubleshooting, along with eligibility for Secret Clearance and U.S. citizenship. The position offers a full-time salary range of $135,700 to $251,900 and medical, dental, vision, and other benefits.

Required Skills

HDL programming
Xilinx Vivado
FPGA simulation
Digital design
Debugging
UVM verification
Git
C/C++/Python
Datalink architecture

Additional Information

Minimum Education: Bachelor of Science or higher in Electrical Engineering or a related discipline, or equivalent experience and education
Required Previous Experiences: HDL programming with VHDL, Verilog, and/or SystemVerilog
Hardware-software integration and validation
Xilinx FPGA development with Vivado
FPGA simulation with Synopsys VCS and SystemVerilog
Troubleshooting designs and resolving integration issues
Preferred Qualifications: Master of Science in Electrical Engineering or a related technical field
Active DoD Secret or Top Secret clearance
Defense electronics and RF FPGA development
Git version control
Multiple FPGA vendor experience
C, C++, or Python programming
Complex digital systems debugging
UVM-based verification methodologies
MFC DAR process
Missile systems experience
Missile safety experience
Production or manufacturing troubleshooting
Datalink or T/R module architecture
Technical documentation
Customer technical presentations
Failure investigation leadership
Collaborative production support