ASIC & FPGA Design Engineer Stf - E4 at Lockheed Martin

Department: MFC-Primary

Compensation

$120,600 – $224,000/yr

Setup: Hybrid
Location: Orlando, Florida
Type: Full-time
Level: staff+
Posted: Sep 28, 2026

Description

Lockheed Martin is hiring a Staff ASIC & FPGA Design Engineer for its Hardware Engineering team in Orlando, Florida. The role leads FPGA and ASIC architecture and development across the MFC portfolio, including requirements capture, HDL design, verification, trade studies, design assurance, configuration control, and mentorship. Candidates must be U.S. citizens, obtain a DoD Secret clearance, and have at least five years of FPGA design and simulation verification experience. The full-time salary range is $120,600 to $224,000, with medical, dental, vision, flexible work arrangements, and other benefits.

Required Skills

FPGA design
VHDL/Verilog
Vivado
UVM
Timing analysis
GitLab
Memory interfaces
NSA algorithms
RF waveforms

Additional Information

Minimum Education: Bachelor of Science degree in Electrical Engineering or a closely related STEM field
Required Previous Experiences: At least 5 years of professional FPGA design and simulation verification experience
Xilinx/AMD FPGA and Vivado/Vitis experience
Multi-vendor FPGA experience
FPGA simulation and UVM verification experience
Hardware-software integration and validation experience
High-speed data and memory interface experience
Git/GitLab version control experience
Preferred Qualifications: Master’s degree or PhD
LM/MFC design and missile/sensor program experience
MFC Design Assurance experience
Range safety requirements experience
SystemVerilog, C/C++, MATLAB/Simulink, and Synopsys tool experience
NSA algorithm and RF waveform implementation experience
Simulink and HDL Coder experience
GitLab configuration control experience
EOIR imaging and missile/processor interface experience
FPGA trade-off study experience
Active DoD Secret or Top Secret clearance
Translation Company Name: Lockheed Martin