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ASIC and FPGA Verification Engineer at Nesco Resource

Location
Sunnyvale, California
Type
Full-time
Level
not_specified

Description

The posting seeks a verification UVM expert for an R&D program focused on ASIC and FPGA verification. The role involves creating and maintaining UVM verification environments, testbenches, tests, and coverage for FPGA and ASIC designs, as well as improving automation and developing more cost-effective verification approaches.

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