Description
The ASIC Design Engineer will design DMA subsystem blocks for Apple's Neural Engine, taking ownership from microarchitecture specification through RTL implementation, front-end signoff, and design verification closure. The role involves optimizing throughput, data consistency, buffering, arbitration, and security; collaborating with architecture, physical implementation, design, and verification teams; and mentoring engineers. The minimum qualification is a bachelor's degree plus 10 years of industry experience, with SoC front-end RTL, DMA microarchitecture, on-chip bus protocols, and design automation experience preferred.
