Description
The Pixel IP DMA Design Engineer will design high-performance, low-power DMA engines that move large amounts of data between the memory system and the Pixel IP Engine. The role involves exploring performance, power, and area solutions; detailing specifications and building RTL designs; and collaborating with architecture, design, and verification teams to verify functionality and performance. The position requires a bachelor's degree and three years of experience, with preferred qualifications in multimedia IP, SoC front-end ASIC RTL design, DMA engines, memory controllers, interconnects, and on-chip bus protocols.
