Description
NVIDIA is hiring an ASIC Design Engineer to develop and deploy in-house tools and workflows, own verification tools for common design blocks, support automated RTL generation, and build integration workflows for IP development environments. The role requires a bachelor’s or master’s degree in Electrical or Computer Engineering, at least three years of experience, Verilog, Python or Perl, Unix/Linux shell scripting, and Makefile experience. Prior ASIC verification, clock/reset design, CDC, and backend flow experience are advantageous. The position is hybrid and offers a base salary of 116,000–189,750 USD for Level 2 and 136,000–218,500 USD for Level 3, plus equity and benefits.
