Description
Annapurna Labs is hiring an ASIC Design Methodologies and Infrastructure Engineer to automate design flows and build large-scale solutions that accelerate silicon development. The role involves developing methodologies and infrastructure, enhancing design flows, collaborating with vendors on design tools, and working with architects, designers, and verification engineers. Candidates need extensive ASIC, digital design, analog or RF layout, wireless communications, automation, and verification experience, along with UVM, C, and System C scripting skills. The position is based in Cupertino, California, or Austin, Texas, with annual base salaries of $183,000–$247,600 in Cupertino and $159,200–$215,300 in Austin.
