ASIC Design Verification Engineer at Google

Google is hiring an ASIC Design Verification Engineer to develop and verify custom silicon for TPU and other data-center AI/ML accelerators. The role covers project definition, RTL design verification, constrained-random verification environments, coverage measurement, debugging, and silicon bring-up. Candidates need a bachelor's degree in a relevant engineering or computer science field and at least eight years of design verification experience, including RTL verification with SystemVerilog and UVM. The position offers a US base salary of $163,000–$236,000 plus a 15% bonus target, equity, and benefits.