ASIC Design /Verification Engineer, Sr Staff at Synopsys

Synopsys is hiring an HBM Controller IP Engineer to design and implement RTL-based HBM controller IP cores for SoC applications. The role covers micro-architecture development, architectural and verification decisions, SystemVerilog/UVM testbench creation, verification planning and coverage, design reviews, global-team collaboration, mentoring, and technical documentation. Candidates need extensive RTL and micro-architecture experience, UVM/VMM/OVM and SystemVerilog knowledge, SoC/ASIC design-flow and coverage-driven verification experience, protocol knowledge, scripting and Unix skills, strong English communication, and BSEE or MSEE experience.