Description
Synopsys is hiring an Architect Digital Design - High Speed Memory Interface IP - HBM/DDR/LPDDR in Hyderabad, India. The role defines and owns the digital architecture for HBM, DDR, or LPDDR memory controllers, from high-level partitioning through RTL implementation strategy, while balancing performance, area, power, verification complexity, and protocol compliance. Responsibilities include collaborating with PHY, verification, and product teams; selecting design methodologies and tools; mentoring engineers; and reviewing RTL, testbenches, and verification plans. The position requires 12–15+ years of ASIC digital design experience, significant memory-interface or high-speed IO experience, and knowledge of HBM, DDR, LPDDR, or similar protocols.
