Description
Synopsys is hiring an experienced ASIC Digital Architect to define and execute digital architecture and RTL design and verification for DDR controller products and related protocols. The role involves creating design plans, collaborating with cross-functional teams, applying advanced design and verification methodologies, mentoring junior engineers, and communicating with internal and external stakeholders. Candidates need extensive ASIC RTL design experience, deep knowledge of DDR, PCIe, UCIe, AMBA, and UAL protocols, proficiency with digital design tools, strong problem-solving and communication skills, and the ability to work independently and lead technical initiatives.
