Description
Synopsys is hiring an experienced ASIC Digital Architect to define and execute digital architecture and RTL design and verification for complex semiconductor protocols, including DDR, PCIe, CXL, UCIe, and UAL. The role involves creating design plans, collaborating with cross-functional teams, applying advanced design and verification methodologies, mentoring junior engineers, and communicating with internal and external stakeholders. Candidates need a BSEE or BSCE plus 12 years of experience or an advanced degree plus 10 years of industry experience, extensive ASIC RTL design experience, and deep knowledge of the listed protocols and digital design tools.
