Description
Synopsys is hiring a Senior ASIC Digital Design Engineer in Pune, India, to design, develop, and validate bare-metal firmware for NRZ and PAM-based SerDes IP. The role integrates firmware with mixed-signal and digital subsystems, performs silicon bring-up on prototype test chips, mentors junior engineers, and supports SerDes IP deployment into customer SoCs. Candidates need a bachelor's or master's degree in electrical engineering or equivalent practical experience, at least five years of bare-metal firmware and silicon bring-up experience, strong RTL and digital design skills, and knowledge of SerDes, Ethernet, or PCIe standards.
