Description
Synopsys is hiring a Security IP Verification Engineer in Eindhoven to verify complex security IP subsystems, including cryptographic cores, random number generators, interface modules, and memories. The role involves designing verification strategies, building and maintaining UVM testbenches and formal verification flows, developing test plans and coverage models, automating regression environments, running tests in simulators and on FPGA platforms, debugging RTL and testbench failures, and supporting embedded software and driver verification. Candidates need a bachelor's or master's degree in Electrical Engineering or Computer Science, at least six years of hands-on verification experience, and expertise in SystemVerilog, UVM, assertion-based verification, coverage-driven methodology, and formal verification.
