Description
Bosch is hiring an ASIC layout designer to perform analog layout design from block level through top-level IC integration and physical verification for advanced ASICs in MEMS sensors. The role collaborates with international design teams, wafer foundries, digital backend engineers, and CAD engineers to deliver tape-out flows, generate DFE files, improve PDKs and design environments, and address DRC/ERC/ANT/LVS violations and process effects. The position requires a relevant microelectronics or electrical engineering degree, at least eight years of analog or mixed-signal IC layout experience, knowledge of specified semiconductor technologies, and proficiency with Cadence and related verification and extraction tools.
