Description
Google is hiring an ASIC Physical Design Engineer to develop custom silicon solutions for direct-to-consumer products. The role covers ASIC RTL-to-GDS implementation, full-chip physical design, performance and power optimization, and cross-functional delivery. Candidates need a bachelor's degree in electrical engineering or equivalent practical experience, four years of physical-design experience, and experience with synthesis and PnR tools, high-performance synthesis, sign-off convergence, and STA. Preferred qualifications include floorplanning, low-power implementation, ASIC design methodology, circuit and device physics, Verilog/SystemVerilog, and scripting skills. The position offers $138,000–$197,000 USD plus a 15% bonus target, equity, and benefits, and typically requires in-person interviews.
