ASIC Physical Design, Staff Engineer - 18331 at Synopsys

Synopsys is hiring a Staff Engineer - Physical Design in Hyderabad, India, to lead the physical design of UCIe PHY blocks and testchips from floorplanning through tapeout on 5nm and more advanced nodes. The role owns synthesis, place and route, timing closure, physical verification, signoff, PPA tradeoffs, design reviews, flow improvements, and mentoring, while collaborating with verification, DFT, IP integration, foundry, and customer teams. Candidates need 4–7 years of ASIC physical design experience, multiple tapeouts and signoffs in 5nm or more advanced nodes, proficiency with DC, PT, ICC2/FC, and ICV, and strong FinFET and advanced-node knowledge.