ASIC/SOC DFT Engineer (Silicon Engineering) at SpaceX

SpaceX is hiring an ASIC/SoC DFT Engineer for its Silicon Engineering organization supporting Starlink. The role develops and verifies Design for Test (DFT) fabrics and IP for space and ground ASICs, including scan insertion, ATPG analysis and content creation, gate-level simulation, coverage optimization, and collaboration with physical design, ATPG, and manufacturing teams. The position requires a bachelor's degree in electrical engineering, computer engineering, or computer science, at least one year of professional ASIC experience, and scan insertion or DFT setup experience. It is based in the United States, with Level 1 or Level 2 compensation and comprehensive benefits.