ASIC Verification Engineer at Axis

Language

Location: Stockholm
Type: Full-time
Level: not_specified

Description

Axis Communications is hiring a permanent ASIC Verification Engineer for its R&D site in central Stockholm. The role verifies ARTPEC system-on-chip hardware for network video and surveillance products, covering SoC-level software-driven and coverage-driven constrained-random verification, digital design concepts, programming, protocols, and related formal, low-power, gate-level, and post-silicon validation methods. The position requires a bachelor’s or master’s degree in a relevant engineering or computer science field and offers benefits including health insurance.

Required Skills

SoC verification
SystemVerilog
UVM
Python
C/C++
RTL design
Formal verification
Low-power verification
SoC protocols
Gate-level simulation
Embedded systems
Problem solving

Additional Information

Minimum Education: Bachelor’s or master’s degree in electrical engineering, computer science, engineering physics, or a similar field.
Required Previous Experiences: Experience with coverage-driven constrained-random verification using SystemVerilog and UVM.
Preferred Qualifications: Experience with formal verification and assertion-based methodologies.
Exposure to low-power verification using UPF or CPF.
Knowledge of Transaction-Level Modeling concepts and methodologies.
Knowledge of AXI, PCIe, Ethernet, or DDR protocols.
Experience with gate-level simulation and post-silicon validation.
Ability to create structured, well-organized documentation.
Understanding of embedded systems and hardware-software interactions.
Curiosity, technology enthusiasm, collaborative teamwork, and strong problem-solving and communication skills.