Description
Hewlett Packard Enterprise is hiring an onsite ASIC Verification Engineer to work primarily from an HPE office. The role develops and maintains UVM-based verification environments, designs and executes SystemVerilog and constrained-random test suites, verifies large ASIC blocks, supports tape-out readiness, collaborates with logic and software teams, and automates verification infrastructure with Perl, Python, or Shell scripts. Candidates need a BSEE or MSEE, at least three years of ASIC verification experience, strong SystemVerilog and UVM skills, and scripting proficiency.
