Description
The NVIDIA Clocks Team is hiring a Senior ASIC Verification Engineer to own end-to-end validation of clocking and reset structures in Tegra automotive and datacenter products. The role covers test planning, automation, verification flows, coverage metrics, test execution, bug identification and resolution, and productization, while collaborating with architecture and design teams and coordinating across time zones. Candidates need a BS or MS in EE/ECE or equivalent experience, at least three years of relevant industry experience, and expertise in System Verilog, UVM, C++, Perl, Python, formal verification, coverage metrics, and block- and system-level verification.
