Contract-RISC-V CPU Microarchitecture RTL Engineer at Tenstorrent Unlisted/Referral Jobs

Tenstorrent is hiring a Graduate RISC-V CPU Microarchitecture / RTL Engineer to contribute to the design, verification, and optimization of next-generation RISC-V CPU units. The role involves microarchitecture specification, RTL design in Verilog, SystemVerilog, or VHDL, verification strategy and simulation, formal and checker-based methods, and PPA closure, with AI tools used to accelerate the design process. The position is hybrid and based in Tokyo, Japan, and requires a degree in electrical, computer, or computer science engineering or a related field.