CPU Design Methodology Engineer at NVIDIA

Department: Engineer, ASIC

Compensation

$168,000 – $310,500/yr

Setup: Remote
Location: Hillsboro, Oregon · Austin, Texas · +2
Type: Full-time
Level: senior
Posted: Sep 21, 2026

Description

NVIDIA is hiring a Senior CPU Design Methodology Engineer to develop scalable system-level methodologies and automation tools for SOC creation, improve front-end chip implementation processes, and own RTL quality checks and reviews. The role requires a master's degree in computer or electrical engineering or equivalent experience, at least 8 years of chip design experience focused on SOC integration and design automation, RTL and verification expertise, and strong scripting skills. The position offers a base salary of 168,000–264,500 USD for Level 4 and 196,000–310,500 USD for Level 5, along with equity and benefits, and applications were accepted until September 25, 2026.

Required Skills

SOC integration
Design automation
Verilog RTL
UVM verification
Perl
Python

Additional Information

Minimum Education: Master's degree in Computer or Electrical Engineering or equivalent experience
Required Previous Experiences: 8+ years of chip design experience specializing in SOC integration and design automation
Experience with RTL design, UVM and System Verilog verification, SOC design and integration flows, and design automation
Preferred Qualifications: Experience in synthesis and physical design
Translation Company Name: NVIDIA