CPU Design Timing Engineer at Apple

Apple’s Silicon Engineering Group is hiring a CPU Design Timing Engineer to close timing for CPU projects. The role involves developing timing flows with the CAD team, scripting analysis flows, and collaborating with CPU micro-architects and implementation engineers. Candidates need a bachelor’s degree, at least 10 years of relevant industry experience, experience with 1 GHz+ designs and multiple clock and power domains, static timing tool experience, knowledge of cross talk, noise, OCV, uncertainty, and derate methodology, and scripting experience in TCL, Perl, or Python.