CPU Microarchitect/RTL Engineer - Execution, Load/Store at Apple

Department: Hardware

Location: Beaverton, Oregon · California · +1
Level: senior
Posted: Apr 14, 2026

Description

Apple’s Silicon Engineering Group is hiring a CPU Microarchitect/RTL Engineer to develop and refine CPU microarchitecture and RTL designs for integer, floating-point, and load/store execution. The role covers architectural specification, RTL ownership, verification, performance exploration, and physical-design delivery, with a minimum of a bachelor’s degree and 10+ years of relevant industry experience.

Required Skills

Microprocessor architecture
RTL design
Verilog or VHDL
Waveform debugging
Out-of-order execution
C or C++

Additional Information

Minimum Education: Bachelor’s degree
Required Previous Experiences: 10+ years of relevant industry experience
Microprocessor architecture experience
Logic design with timing and power implications
Verilog or VHDL experience
Simulator and waveform debugging experience
Preferred Qualifications: Expertise in out-of-order execution, instruction scheduling, integer and floating-point execution, load/store execution, or cache and memory subsystems
Low-power microarchitecture techniques
High-performance CPU microarchitecture techniques and trade-offs
C or C++ programming
Perl or Python programming

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