Description
Apple’s Silicon Engineering Group is hiring a CPU Physical Design Engineer to drive RTL-to-GDS convergence, deliver block-level physical design, close backend flows, improve silicon yield, and collaborate with CAD, methodology, functional, and custom IP teams on CPU floorplan, timing, power, reliability, testability, and memory and standard-cell optimization. The role requires a minimum bachelor’s degree and at least three years of relevant industry experience, along with digital circuits, timing and power concepts, logic design, and Perl or TCL experience.
