Description
Google is hiring a CPU SoC DV Engineer to verify and debug CPU subsystems from RTL simulation through gate-level netlists and silicon characterization. The role leads ARM SoC verification, develops verification environments, executes GLS and timing-annotated simulations, converts simulation sequences into ATE/SLT patterns, and partners with ATE teams to stabilize high-speed patterns and resolve complex post-silicon failures across PVT corners.
